1. Field of the Invention
The present invention relates to a switching power supply apparatus, such as a step-down chopper switching power supply apparatus, and more particularly to a power-saving technology during standby and technologies related thereto.
2. Prior Art
PWM control systems and intermittent control systems were available as control systems for switching devices in conventional step-down chopper switching power supply apparatuses.
FIG. 10 is a circuit block diagram of a PWM control system in accordance with a first conventional example (for example, refer to Japanese Laid-open Patent Application No. Hei 10-191625), and FIG. 11 shows the operation waveforms of the system. In FIGS. 10 and 11, VOUT designates the voltage at the output terminal OUT, IOUT designates the current at the output terminal OUT, VDS designates the voltage at the DRAIN terminal of a switching device 52, IDS designates the current at the DRAIN terminal, flowing in the switching device 52, and VCC designates the voltage at the CONTROL terminal shown in FIG. 10. The circuit comprises an input capacitor 51, the switching device 52, a control circuit 53 for the switching device 52, a capacitor 54 for control circuit reference voltage, a conversion circuit 55, an output voltage detection circuit 56, and a protection device 57.
When a voltage (a voltage obtained when a commercial AC power supply rectified by a rectifier, such as a diode bridge, is smoothened by the input capacitor 51, or a DC voltage) is applied from the input terminal IN to the DRAIN terminal of the switching device 52, a current is supplied by the internal-circuit current supply circuit 58 of the control circuit 53 to the capacitor 54 for control circuit reference voltage, connected to the CONTROL terminal via a switch 59. Hence, VCC rises, and the control circuit 53 starts the ON/OFF control of the switching device 52 using a start/stop circuit 60. The ON/OFF control of the switching device 52 is carried out with reference to the CLOCK signal 62 of an oscillator 61 provided inside, and the CLOCK signal 62 is input to a flip-flop 63. The MAX DUTY signal 64 of the oscillator 61 determines the maximum ON time of the switching device 52. When VCC of the control circuit 53 rises to a predetermined value or more, a shunt regulator 65 operates, and a current is supplied to resistors 66 and 67. Hence, the voltage across the resistor 67 rises, and this voltage is compared with the SAWTOOTH signal 69 (triangular wave) of the oscillator 61, serving as the reference voltage signal of a comparator 68. The output of the comparator 68 is connected to the reset terminal of the flip-flop 63 via an OR circuit 70. This configuration is used to carry out the PWM control of the switching device 52.
When the ON/OFF control of the switching device 52 starts, power is supplied to the conversion circuit 55 comprising a diode 71, a coil 72 and an output capacitor 73, whereby VOUT rises. VOUT is detected by the output voltage detection circuit 56. When VOUT becomes a predetermined value or more, a current flows from the OUT terminal to the CONTROL terminal of the control circuit 53 while the switching device 52 is in its OFF state. Hence, VCC rises, and the PWM control of the switching device 52 is carried out.
In addition, for protection of the switching device 52, a drain current detection circuit 74 detects the DRAIN current IDS, the flip-flop 63 is reset by the OR circuit 70, and the switching device 52 is turned OFF by an AND circuit 75.
As described above, in the PWM control system, as the load at the output becomes lighter, the ON duty of the switching device is made smaller gradually (the peak value of the current IDS flowing in the switching device lowers eventually), whereby the output voltage is stabilized and power saving is attained.
Furthermore, FIG. 12 is a circuit block diagram of an intermittent control system in accordance with a second conventional example (for example, refer to Japanese Laid-open Patent Application No. 2003-180071), and FIG. 13 shows the operation waveforms of the system. In FIGS. 12 and 13, VOUT designates the voltage at the output terminal OUT, IOUT designates the current at the output terminal OUT, VO1 designates the voltage obtained when VOUT is divided by two resistors R1 and R2, VDS designates the voltage at the DRAIN terminal of a switching device 52, IFB designates the current at the FB1 terminal, and IDS designates the current at the DRAIN terminal, flowing in the switching device 52. The circuit comprises an input capacitor 51, the switching device 52, a control circuit 53 for the switching device 52, a capacitor 54 for control circuit reference voltage, a conversion circuit formed of a diode 71, a coil 72 and an output capacitor 73, an output voltage detection circuit 56, and the two resistors R1 and R2.
When a voltage (a voltage obtained when a commercial AC power supply rectified by a rectifier, such as a diode bridge, is smoothened by the input capacitor 51, or a DC voltage) is applied from the input terminal IN to the DRAIN terminal of the switching device 52, a current is supplied by the regulator 76 of the control circuit 53 to the capacitor 54 for control circuit reference voltage, connected to the BYPASS terminal. Hence, the voltage at the BYPASS terminal rises, and the control circuit 53 starts the ON/OFF control of the switching device 52 using a start/stop circuit 60. The ON/OFF control of the switching device 52 is carried out with reference to the CLOCK signal 62 of an oscillator 61 provided inside, and the CLOCK signal 62 is input to a flip-flop 63 via an AND circuit 77. The MAX DUTY signal 64 of the oscillator 61 determines the maximum ON time of the switching device 52. The voltage at the BYPASS terminal of the control circuit 53 is controlled so as to become a predetermined value at all times by the regulator 76. The FB terminal is connected to the AND circuit 77 and a constant current supply 78 connected to the BYPASS terminal. The output signal of an OR circuit 79, to which the inversion signal of the MAX DUTY signal 64 of the oscillator 61 and the output signal of a drain current detection circuit 74 are input, is input to the reset terminal of the flip-flop 63. The intermittent operation of the switching device 52 is controlled depending on the voltage difference across the FB terminal and the SOURCE terminal to which a capacitor C4 is connected.
When the ON/OFF control of the switching device 52 starts, power is supplied to the conversion circuit comprising the diode 71, the coil 72 and the output capacitor 73, and the voltage VOUT at the output terminal OUT rises. VOUT is detected by the resistors R1 and R2 and the output voltage detection circuit 56. When VOUT becomes a predetermined value or more (when the voltage at the VO1 terminal becomes the reference voltage or more of a comparator 80 to be exact), a P-channel MOSFET 82 serving as a switching device is turned ON by the comparator 80 and a NAND circuit 81. This increases the amount of the current supplied to a current mirror circuit formed of N-channel MOSFETs 83 and 84 serving as two switching devices. Hence, the current IFB at the FB1 terminal increases, and the potential at the FB terminal connected to the capacitor C4 lowers, whereby the control circuit 53 suspends or stops the switching device 52. When VOUT becomes the predetermined value or more and when the output signal of the NAND circuit 81 becomes L (low), a P-channel MOSFET 85 serving as a switching device turns ON, and the current of a constant current supply 86 is supplied to the resistor R2 via the VO1 terminal. Hence, the voltage at the VO1 terminal rises slightly; that is, VOUT also rises slightly, whereby a hysteresis characteristic is provided so that the voltage at the output terminal OUT is stabilized.
When the switching device 52 turns OFF, power supply to the output terminal OUT is stopped, and VOUT lowers gradually. When VOUT becomes the predetermined value or less, the P-channel MOSFET 82 turns OFF, and the IFB current lowers. Hence, the potential at the FB terminal rises, and the switching device 52 is ON/OFF controlled again. This intermittent control is carried out hereafter. The start and stop of the output voltage detection circuit 56 will be described below. When the ON/OFF control of the switching device 52 is started, power is supplied from the choke coil 72 to the output capacitor 73, whereby the voltage of the output capacitor 73 rises. In the output voltage detection circuit 56, power is supplied from the output capacitor 73 via a regulator 90 to the VCC terminal to which the capacitor C5 is connected. When the voltage at the VCC terminal becomes the reference voltage or more of a comparator 89, the output voltage detection circuit 56 starts operation. When the voltage becomes the reference voltage or less of the comparator 89 (a state wherein power supply from the output capacitor 73 to the VCC terminal is insufficient, for example, the output at the output terminal is overloaded or short-circuited, or the input voltage has lowered significantly), the output voltage detection circuit 56 stops operation. The regulator 90 controls the voltage VCC so that the voltage becomes the reference voltage (starting voltage) of the comparator 89 at all times. Hence, the output signal of the comparator 89 is controlled so as to become a high signal at all times. The comparator 89 shown in FIG. 12 serves as a circuit for starting/stopping the output voltage detection circuit 56. When the reference voltage of the comparator 89 is provided with a hysteresis characteristic, the output voltage detection circuit 56 operates stably. Numerals 87 and 88 designate current supplies.
In addition, for protection of the switching device 52, the drain current detection circuit 74 detects the DRAIN current IDS, and the switching device 52 is turned OFF.
As described above, in the intermittent control system, as the load at the output becomes lighter, the number of switching times of the switching device is decreased gradually, whereby the output voltage is stabilized and power saving is attained.
However, in the nonisolated power supply wherein the switching device is on the high side and the output voltage detection section is on the low side as described above, further reduction in power consumption during standby is difficult in the case when the currently available PWM control or intermittent control is used.
In other words, in the above-mentioned conventional PWM control system and intermittent control system, further reduction in power consumption during standby, particularly in a no-load condition, cannot be expected because of the following reasons.    (1) In a no-load condition in the PWM control system, the peak value of the current flowing in the switching device lowers. However, the number of switching times is constant regardless of load condition. Hence, further reduction in power consumption is difficult.    (2) In a no-load condition in the intermittent control system, the number of switching times of the switching device decreases. However, the peak value of the current flowing in the switching device is constant. Hence, further reduction in power consumption is difficult.
Furthermore, in the case when the frequency during the intermittent control is in the audible frequency range, since the peak value of the current flowing in the switching device is constant, the coil generates noise.